English to French Tech/Engineering Patents

The flip-flop circuit receives a test signal at a test-in terminal and a data signal at a data-in terminal and generates a scan-out signal. The flip-flop circuit comprises a buffer and a scan flip-flop. The buffer has an input terminal coupled to the test-in terminal and an output terminal and further has a first power terminal and a second power terminal.

Each of the first and second flip-flop circuits receives a test signal at a test-in terminal


Here we are wondering if the word "in" in test-in terminal should be translated as "d'entrée", the same case with other terms "data-in terminal" and "scan-out terminal"
the test-in terminal TI thereof receives a scan test signal S10 to serve as its test signal. The flip-flop circuit 10 generates a scan-out signal S12 at its data-out terminal DQ, and the scan-out signal S12 is transmitted to the combinatorial logic circuit 13. For each of the scan output flip-flops 11 and 12, the data-in terminal DI receives the signal output ffom the corresponding combinatorial logic circuit to serve as its data signal, the test-in terminal TI receives the scan-out signal output ffom the data-out terminal DQ of the previously flip-flop circuit to serve as its test signal, and the scan- out signal output by the data-out terminal DQ is transmitted to the folio wing combinatorial logic circuit.